期刊刊名：大葉學報 　 卷期：10卷1期

篇名出版日期：2001年6月1日

作者：陳順溪,程仲勝,曾國昌,楊政興,陳少傑,SHUENN-SHI CHEN,JONG-SHENG CHERNG,GUO-CHANG TZENG,CHENG-HSING YANG,SAO-JIE CHEN

語言：English

關鍵字：printedcircuit board (PCB), pin grid array (PGA), simulated annealing,印刷電路板,接點格狀陣列,模擬退火

被點閱次數：4次

閱讀時間：31sec

摘要：
Given a pin-grid-array (PGA) package with an area-array of I/O pins and some devices (blocks) distributed on a printedcircuit board (PCB), the authors propose an algorithm to obtain a pin assignment solution which eases the routing in the PGA package and then improves the nets routability of PCB. In the algorithm, the routing costs of PGA package and PCB have to be calculated separately during pin assignment. A simulated annealing technique is also applied to improve the solution by exchanging the pin assignment for some chosen nets in the PGA package. Simulation results on various PCB circuits show that PCB routings produced with pin assignment under consideration can be achieved far better than the routings without pin assignment.

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